System-level Packaging (SiP) Technology for Integrated Circuits and Its Application

08 Jun 2019

Due to the increasing level of integrated circuit design and process technology, integrated circuits are becoming larger and larger, and the entire system can be integrated into one chip (it is now possible to integrate 108 transistors on one chip). This makes it possible to integrate a system (or subsystem) consisting of circuits with multiple functions of hardware and software into a single chip. To learn more about IC industry, you’d better visit electronics manufacturing expos. In the late 1990s, integrated circuits have entered the era of system-on-chip (SOC).

In the 1980s, ASICs used standard logic gates as the basic unit, and the processing lines were supplied to designers for free use to shorten the design cycle. Check out their booth in electronics manufacturing expos to be abreast of the latest discoveries and developments. In the late 1990s, they entered the system-on-chip era, integrating CPU, DSP, and logic circuits, analog circuits, RF circuits, memory and other circuit modules, embedded software and etc. on one chip and connected to each other to form a complete system.

Due to the increasing complexity of system design, the design industry has developed a factory specializing in the development of various integrated circuit modules (called IP cores, ie IP cores) with the above functions, and these modules are provided to other system designers through authorization. Nowadays IP cores are quite common in electronics manufacturing expos. The designer will design with the IP core as the basic unit. The repeated use of the IP core shortens the system design cycle and increases the success rate of the system design.

Studies have shown that, compared with IC-based systems, higher system specifications can be achieved under the same process technology conditions because the SOC design can comprehensively and comprehensively consider the various conditions of the entire system. The 21st century will be a period of rapid development of SOC technology, we can expect display of great progress of SOC technology in electronics manufacturing expos.

In recent years, due to the portable development of the whole machine and the trend of miniaturization of the system happen in industry and seen in electronics manufacturing expos, it is required to integrate more different types of components on the chip, such as Si-CMOSIC, GaAs-RFIC, various passive components, opto-mechanical devices, antennas, connectors and sensors, etc. The SOC for single materials and standard processes is limited. In recent years, the system-in-package (SiP), which is rapidly developed on the basis of SOC, can not only assemble multiple chips in one package, but also stack and integrate the different types of devices and circuit chips. Complex, complete system.

Compared with SOC, SiP has the following advantages :

  • More new features are available;
  • A variety of process compatibility;
  • Flexibility and adaptability;
  • low cost;
  • Easy to block test;
  • The development cycle is short.
  • You may find more advantages in electronics manufacturing expos

SOC and SiP complement each other. It is generally believed that SOC is mainly used to upgrade products with slower generation and military equipment to require high performance products. SiP is mainly used for consumer products with shorter cycle times, such as mobile phones. SiP has yet to be further improved in terms of yield and computer-aided design. You can register and visit the leading electronics manufacturing expo to check latest progress in SiP manufacturing industry.

Due to the com plexity of SiP, higher requirements are placed in both design and process technology. In design, engineers, systems engineers, layout designers, silicon technology design, test and manufacturing teams work together to achieve the best performance, smallest size and lowest cost. Firstly, the parameters and layout of IC chips, power and passive components used in computer-aided simulation design; in the design of high-density wiring, it is necessary to consider eliminating oscillation, overshoot, crosstalk and radiation; heat dissipation and reliability considerations; substrate materials Choices (including dielectric constant, loss, interconnect resistance, etc.); design rules for line width, spacing, and vias; and finally design a layout of the motherboard.

SiP adopts the fast-developing flip-chip bonding interconnect technology in the past decade. The flip-chip bonding has the advantages of lower DC voltage, higher interconnect density, less parasitic inductance, better thermal characteristics and electrical performance than wire bonding, but the cost is better. The manufacturers has presented its latest research results in recent electronics manufacturing expos. Another big advantage of SiP is the ability to integrate various passive components. Passive components are increasingly used in integrated circuits, such as in mobile phones where the ratio of passive components to active components is approximately 50:1.

Adopting low-temperature co-fired multilayer ceramics (LTCC) and low-temperature co-fired ferrite (LTCF) technology developed in recent years. Related products have appeared at electronics manufacturing expos. Therefore, integrating passive components such as resistors, capacitors, inductors, filters and resonators in multilayer ceramics. Just like integrating active devices in silicon. In addition, in order to increase the area occupied by the die in the package, more than two chip stack structures are used, and three-dimensional integration is performed in the Z direction. New process technologies such as the development of ultra-thin flexible insulating substrate between laminated chips, copper wiring on the substrate, interconnect vias and metallization have been developed.

SiP is widely used in the industry for its competitiveness in terms of its ability to enter the market faster, smaller, thinner, lighter and more. You can register and visit the leading electronics manufacturing expo to check latest progress in SiP manufacturing industry. Its main application areas are RF/wireless applications, mobile communications, networking equipment, computers and peripherals, digital products, imaging, bio and MEMS sensors.

By 2010, the wiring density of SiP is expected to be 6000 cm/cm2, the heat density is 100 W/cm2, the component density is 5000/cm2, and the I/O density is 3000/cm2. System-in-package design is also moving toward computer-aided automation like SOC's automatic placement and routing. Intel's state-of-the-art SiP technology has integrated five stacked flash memory chips into a 1.0mm ultra-thin package.

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