When AI Performance Meets a Packaging Bottleneck
For decades, semiconductor packages have largely relied on organic substrates, particularly resin-based ABF (Ajinomoto Build-up Film) materials. Their mature manufacturing processes, relatively low cost and established supply chains have made them a practical solution for a wide range of applications. However, the rapid development of AI accelerators and high-performance computing (HPC) systems is fundamentally changing packaging requirements.
Modern AI processors increasingly combine multiple chiplets with high-bandwidth memory (HBM), requiring significantly more electrical connections within increasingly large packages. As package dimensions extend beyond roughly 70–100 mm per side, differences in thermal expansion between silicon and organic substrates become more difficult to manage. During repeated heating and cooling, the substrate and silicon dies expand and contract at different rates, increasing the risk of warpage, solder-joint cracking and alignment problems. At the same time, shrinking the spacing between copper interconnects makes it increasingly difficult to maintain signal integrity and manufacturing precision. These challenges are turning packaging into a potential bottleneck for further AI performance scaling.
Why Glass Is Gaining Attention
Glass offers several characteristics that could make it attractive for large, high-density semiconductor packages. Its coefficient of thermal expansion can be closer to that of silicon than conventional organic materials, potentially reducing thermal expansion mismatch between the substrate and semiconductor dies. Glass also provides high dimensional stability, which can help manufacturers maintain tighter geometries as interconnect dimensions shrink.
Another important technology is the Through-Glass Via (TGV). Microscopic holes can be created through a glass panel using drilling or laser-based processes and filled with copper, creating vertical electrical connections between its two surfaces. Fine copper wiring can then be formed across both sides of the substrate.
Together, these characteristics could allow glass substrates to accommodate substantially more interconnects within the same area and support larger, more complex packages. Electronics For You, for example, cites industry estimates suggesting that glass substrates could potentially support around ten times more interconnects in the same area than conventional organic substrates.
Chiplets, HBM and the Push Toward Higher Density
The growing adoption of chiplet architectures is one of the strongest forces behind this development. Rather than placing all computing functions on a single large die, chiplet-based designs divide different functions among multiple dies and integrate them within the same package. This approach offers greater design flexibility and allows different process technologies to be combined, but it also creates a much greater demand for high-density interconnects.
HBM adds another layer of complexity. By placing high-bandwidth memory close to the processor, AI systems can achieve the data throughput required for increasingly demanding workloads, but the processor, memory stacks and interconnect structures must all fit within a tightly constrained package footprint. This is driving rapid development across 2.5D and 3D integration, advanced interposers, hybrid bonding, wafer-level packaging and panel-level packaging. Industry analysts identify AI and HPC as major forces accelerating these developments, while glass substrates are increasingly being explored as one potential platform for the next generation of high-performance packages.
Glass Is Promising — But Not Yet Ready to Replace Organic Substrates
The potential of glass does not mean that it is ready to replace organic substrates across the semiconductor industry. In fact, glass introduces a new set of manufacturing challenges. Because glass is brittle, cracks generated during drilling, processing or dicing can affect manufacturing yields, while thermal stress can increase the risk of crack propagation.
The supply chain for suitable specialty glass is also relatively concentrated, creating another potential bottleneck as demand grows. As a result, most glass-substrate development remains at the pilot or qualification stage in 2026. Intel has demonstrated large glass-based packages through its R&D work, while Samsung Electro-Mechanics, LG Innotek and TSMC are among the companies exploring related technologies. Industry forecasts cited by Electronics For You suggest that limited-volume production for selected high-performance applications could begin around 2028.
The Next Challenge Is Manufacturing at Scale
As advanced packaging becomes more complex, the challenge is shifting from simply proving that a technology works to demonstrating that it can be manufactured reliably, economically and at high volume. Glass substrates illustrate this transition particularly well.
Producing a high-density glass package requires more than the glass panel itself: laser processing, TGV formation, copper deposition, fine-line redistribution, bonding, inspection, metrology, testing and thermal management must all work together. At the same time, advanced packaging structures are becoming increasingly difficult to inspect because more critical interconnections and heterogeneous materials are buried within the package. Industry experts expect failure analysis, inspection and metrology to become increasingly important as chiplets, 2.5D/3D integration, HBM and other heterogeneous packaging technologies move toward higher-volume production.
A Global Technology Race Is Taking Shape
The development of glass substrates is therefore part of a much broader transformation in semiconductor packaging. Intel has been advancing glass substrates as part of its future packaging roadmap, while TSMC, Samsung Electro-Mechanics and other industry players are pursuing their own approaches to next-generation packaging.
Meanwhile, advances in chiplets, HBM, hybrid bonding, panel-level packaging and co-packaged optics are creating multiple technology paths for overcoming the scaling challenges of AI systems. The industry is unlikely to converge on a single packaging solution in the near term; instead, different architectures and materials will continue to be evaluated according to performance, yield, cost and application requirements.
China’s Advanced Packaging Ecosystem Adds Another Dimension
Against this global backdrop, China is also becoming an important market to watch. The country has developed a broad electronics manufacturing ecosystem spanning semiconductor packaging and testing, substrates, PCBs, electronic components, SMT assembly, inspection and industrial automation. Major Chinese OSAT companies are expanding their advanced packaging capabilities as demand from AI and HPC applications grows, while domestic companies and research institutions are also exploring technologies related to glass substrates and TGVs.
The importance of this ecosystem lies not in any single material or packaging technology, but in the combination of manufacturing capacity, equipment supply chains and downstream electronics applications. As emerging packaging technologies move from laboratory research toward industrialisation, this broader manufacturing environment could play an increasingly important role in their development and adoption.
Where Will Advanced Packaging Go Next?
Glass substrates are unlikely to become an overnight replacement for conventional organic substrates. Their initial adoption will more likely focus on applications where package size, interconnect density, thermal performance and dimensional stability are critical. Yet their development highlights a much larger shift taking place across the semiconductor industry: as AI pushes chips toward unprecedented levels of integration, packaging is becoming an increasingly important part of computing performance itself.
The next generation of AI hardware will depend not only on more powerful processors, but also on the ability to connect, package, inspect, cool and manufacture increasingly complex systems at scale. Whether glass substrates ultimately become a mainstream technology or one of several specialised solutions, the technologies developing around them—from TGV and fine-line interconnects to advanced bonding, inspection and automation—will continue to shape the future of semiconductor manufacturing.
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